IIT Hyderabad Develop Low Power Chips For AI Devices
The need for High-Performance Computing data centers is rapidly growing in order to cater to the growing demand in processing and storing Big Data arising due to the Digital India and other initiatives.
(L-R) Dr. Amit Acharyya, Associate Professor, IIT Hyderabad and Santhosh Sivasubramani, PhD Scholar, IIT Hyderabad.
IIT Hyderabad researchers have developed low power chips that can be used in Artificial Intelligence-powered Devices. They have developed Magnetic quantum-dot cellular automata (MQCA) based nanomagnetic logic architectural design methodology of approximate arithmetic circuits.
The researchers are working towards a vision of realizing resource-constrained Magnetic Chips for Ultra low power portable Artificial Intelligent applications.
Many modern systems such as speech and face recognition systems and IoT enabled devices for remote health monitoring require highly computationally and energy-intensive neural networks. Hence, it is not practically affordable to perform these computations in portable hand-held devices. With these major limitations, all the machine learning algorithms used in these Artificial Intelligent applications runs on remote systems.
These factors put forth a clear demand for low power chip design in the area of Artificial Intelligence. To address these issues, highly intensive convolutions should be performed using ultra low power, least energy-consuming, and area efficient devices, thus motivated us to explore the MQCA based nanomagnetic architecture designs for next-generation rebooting computing platform.
The IIT Hyderabad researchers from the Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, have conducted extensive research in this area and as a proof of concept demonstration, they have shown ‘Dipole coupled MQCA based efficient approximate nanomagnetic subtractor and adder design approach.’
The research was undertaken by a team comprising Santhosh Sivasubramani, Ph.D. Scholar, Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, IIT Hyderabad, Dr. Amit Acharyya, Associate Professor, Department of Electrical Engineering, IIT Hyderabad, and Dr. Chandrajit Pal, Post-Doctoral Research Fellow, IIT Hyderabad. The research has been published in the reputed peer-reviewed journal by Nanotechnology (Prestigious journal of Institute of Physics).
Speaking about the outcomes and benefits of this research, Dr. Amit Acharyya said, “We have computationally modelled, designed and implemented an arithmetic adder, subtractor and add/sub using nanomagnets which are the basic building blocks of performing AI computing. We are aware that the emerging edge computing devices are handy in size as well as requiring low-power computation and are also tolerant to feeble decrease in precision. The reported work of ours’ targets such devices, where there is a significant investment in the research towards making it low power without compromising on accuracy too much. Performing AI computing on edge with approximate nanomagnetic logic deployed on the magnetic ICs is an attempt towards the futuristic computations. I hope this work paves the way towards achieving such a vision.”
To cater the growing demand in processing and storing Big Data arising due to Digital India and other initiatives, the need for High-Performance Computing data centers is rapidly growing. This demand opens up new avenues of computing paradigm. One such emerging next-generation computing platform is MQCA based nanomagnetic computing which is energy efficient, consuming ultra-low-power and possessing reduced Static power dissipation and Dynamic power dissipation.
Speaking about the research, Santhosh Sivasubramani said, “The proposed design methodology of performing approximate arithmetic computation using nanomagnets yields ~50%–80% reduction in the number of nanomagnets and clock cycles without much degradation in the accuracy leading to area and energy efficiency in comparison to the traditional implementation of accurate nanomagnetic logic design. We achieved a 1-bit approximate full adder/subtractor implementation using only 4 individual nanomagnets which offers supremacy over existing designs contributing towards Rebooting Computing. With these becoming successful, we now aim for a bigger goal by porting some power-hungry AI applications on such an indigenously developed ultra-low-power computing platform.”
Intrinsic energy minimization nature and the non-volatility of nanomagnets aid MQCA based NML devices operate at ultra-low power in comparison to its CMOS counterpart enabling a power-hungry system design. Leveraging this inherent advantage of NML, it has been envisaged to possess significant potential in performing approximate computing with a tradeoff between accuracy and power consumption.
Such approximate computing architectures are deployed to perform computationally intensive tasks under the resource-constrained platform. For example, emerging AI computing on edge devices for IoT applications, where a significant reduction in power consumption can be achieved with insignificant loss inaccuracy.
The power consumed by the modern chips are enormously high as the standby power required to maintain the logic states in the chip is equal to the power consumed by the chip during computation.
Traditionally, electronic phenomena are used for information processing (CMOS Devices) and the magnetic phenomena are widely used for data storage (Hard Disks). However, the traditional CMOS devices consumes power supply (standby power) to maintain its ‘logic states’ required for computing information, thus making it volatile.
On the contrary, the emerging next generation electronic devices using ‘dipole coupled nanomagnets’ for computing and information propagation requires no standby power to maintain its logic states thus making it non-volatile. Thus the magnetic chip design started emerging as potential alternative to CMOS based computing which faces challenges with the Moore's law approaching towards its end.
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